[Libre-soc-dev] beginning adding subvl looping to ISACaller

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sat Jul 23 17:40:19 BST 2022

all good, dsubstep and ssubstep added and now incrementing, meaning
that an sv.addi/vec2 or 3 or 4 now works, including predication bits being
applied to the vec2/3/4 as a group, not to individual sub-elements.

the next phase is to add pack/unpack capability which swaps the order
of the outer-inner loops of VL/SUBVL stepping, performing a transpose
on source or destination.


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