[Libre-soc-dev] C4M JTAG TAP: banksel, pullup and pulldown added

[Luke Kenneth Casson Leighton]

https://git.libre-soc.org/?p=c4m-jtag.git;a=summary

i've just added banksel, pullup and pulldown as optional extra
parameters to TAP.add_io().  strictly speaking the Pad "drive strength"
(mA) should also be added but that is for another time.

the reasons why they are being added to the actual JTAG TAP
are two-fold:

1) if it is left up to the GPIO Configuration Wishbone-enabled
peripheral and that wishbone bus *fails* during ASIC testing, there
is no way to test the drive strength of the IO pads nor to redirect
the IOPad to alternate peripherals [which may still be functional]

2) testing of the GPIO Configuration peripheral core is clearly
desirable: answering this question.  "when the settings for
pullup/pulldown and bank-sel are set over its Wishbone Bus,
do those settings get correct set yes or no, even though the
IOPad itself may be non-functional" and this may be
determined by reading the relevant IOConn record from the
IO Shift Register.

put simply, the additional parameters create an ASIC that is
"Designed For Test", in the much more advanced environment
of SoC ASICs with multiple IO functions mapped to a reduced
set of IO pads [1]

l.

[1] in an FPGA environment, absolutely nobody cares in the
least about Bank-select pinmuxing.  you simply recompile
the FPGA bitstream to re-map a completely different Peripheral
Set to the FPGA's IO pads.