[Libre-soc-dev] daily kan-ban update 20feb2022

[lkcl]

On February 20, 2022 1:42:26 PM UTC, lkcl <luke.leighton at gmail.com> wrote:

>after checking that at least the right DFI registers are written to
>under verilator a rebuild for VERSA_ECP5 is underway.

results are that whilst the initialisation worked trying a burst read did not, it placed the DRAM IC into an unknown state that then interfered with further attempts to even write to the console.

helloworld.bin however still works although i cannot be sure that the FPGA or the DRAM IC has been damaged.

l.