[Libre-soc-dev] daily kan-ban update 14feb2020

[lkcl]

On Mon, Feb 14, 2022 at 12:20 AM lkcl <luke.leighton at gmail.com> wrote:
>  also added the opencores uart16550, the plan is to add microwatt, get
> helloworld.bin running under verilator simulation then drop it onto an FPGA.

am now able to see gtkwave traces, core has been added
https://git.libre-soc.org/?p=ls2.git;a=summary

currently resolving wishbone bus mis-match errors and missing stall
signals.

l.