[Libre-soc-dev] SVP64 Vectorised add-carry => big int add
lkcl
luke.leighton at gmail.com
Sun Apr 17 20:30:51 BST 2022
On April 17, 2022 7:17:41 PM UTC, Richard Wilbur <richard.wilbur at gmail.com> wrote:
>
>
>> On Apr 17, 2022, at 11:27, lkcl <luke.leighton at gmail.com> wrote:
>[…]
>>
>> cat[0:127] = (RB) || (RS)
>> sum[0:127] = cat + EXTZ(RA) + [1]*128
>> rhi[0:63] = sum[0:63]
>> if (RA) <= 1 then rhi = rhi + ([0]*63 || 1)
>> RA = rhi
>> RT = sum[64:127]
>
>A question of notation:
>
>I see ‘cat[0:127]’ and think that here we have a case of <signal
>name>[bit high:bit low]
yes. MSB0 numbering.
>(or vice versa, depending on endianness). In essence, all 128 bits of
>‘cat’.
>
>I see ‘([0]*63 || 1)’ and think 64-bit constant value of 0x0000 0000
>0000 0001.
yep.
>So when I see ‘[1]*128’ I think 128-bit constant value of 0xFFFF FFFF
>FFFF FFFF FFFF FFFF FFFF FFFF.
yep
> If that is the case, I can guarantee
>"sum[0:127] = cat + EXTZ(RA) + [1]*128”
>will overflow!
nnnope. truncation occurs (wrap) because the destination (sum) is also only 128 bit.
adding 0xffffffff is basically "subtract 1"
l.
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