[Libre-soc-dev] PLL integration

[Luke Kenneth Casson Leighton]

JP you definitely need to stay up-to-date on latest soclayout. currently

https://git.libre-soc.org/?p=soclayout.git;a=commit;h=689f3552a1d8198759581dadf0bc71227076fcbc

then see experiments9/build_full_4ksram.sh

https://git.libre-soc.org/?p=soclayout.git;a=blob;f=experiments9/build_full_4ksram.sh;hb=HEAD

note that it now uses VERILOG not ilang/rtlil

corresponding Makefile also slightly updated.