[Libre-soc-dev] pysvp64asm: opcode setvli not supported

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue Jun 15 15:30:16 BST 2021


On Tue, Jun 15, 2021 at 3:19 PM Lauri Kasanen <cand at gmx.com> wrote:

>
> Yes, that's right. In your previous /mr example you used fmuls, so I
> thought it works like that - that the addition is part of the /mr, and
> not the instruction.
>

yes, i did - because i wasn't thinking / it hadn't occurred to me.

ok i will do a temporary fix of the assembler for now, using
what's available, and it will involve creating a mask 0b0111_1111
to stop the sv.fadds/mr from over-running, for now.

then later a fmadds can be added, and all the mess disappear.
i want to get the assembly working first before adding new
opcodes.

l.


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