[Libre-soc-dev] pysvp64asm: opcode setvli not supported

[Lauri Kasanen]

On Tue, 15 Jun 2021 13:56:27 +0100
Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:

> Lauri, hi,
>
> for these:
>         # SUM8P2(sum, MACS, sum2, MLSS, w, w2, p)
>         # sv.lfs/els fv0.v, 256(p)
>         # sv.lfs/els fv1.v, 256(win)
>         # sv.fmuls/mr sum, fv0.v, fv1.v
>
> are you expecting  the benaviour to be:
>
> for i in range(8):
>    sum += fv0[i] * fv1[i]
>
> because for that we need FMA (fp mul-and-acc):
>
>     sv.fmadds/mr sum, fv0.v, fv1.v

Yes, that's right. In your previous /mr example you used fmuls, so I
thought it works like that - that the addition is part of the /mr, and
not the instruction.

- Lauri