[Libre-soc-dev] SVP64 Scalar Map-reduce mode added

Lauri Kasanen cand at gmx.com
Thu Jun 10 06:14:46 BST 2021

On Wed, 9 Jun 2021 18:36:57 +0100
Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:

> if you can avoid using the *vector* map-reduce mode for now that would
> be good.  Vector map-reduce mode is:
>      sv.fmuls/mr 1.v, 10.v, 1.v
> and it will use the registers 1, 2, 3, .... as *intermediate* locations in
> order
> to (optimally) perform a parallel tree-reduction.  and also allow
> interrupts in
> the middle of it.

This would probably go in the "optimized MP3 SV" phase. An easy change
at the source level anyway. (and the pysim counters would need to show
somehow the efficiency difference between the two)

- Lauri

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