[Libre-soc-dev] Unexpected clock connexions.

Jean-Paul Chaput Jean-Paul.Chaput at lip6.fr
Thu Jun 3 22:48:35 BST 2021

Hello Luke,

I started to lost the progression in the last thread about the
clock tree. So bottom line for me:

* At tomorrow noon I need something final, whatever is chosen.
  Under the form of a Verilog files commited in soclayout so I
  just have to run Yosys.

* You don't need to run the nsxlib variant, for now it diverge
  too much from the TSMC one. Will resync later.

Good night,

      .-.     J e a n - P a u l   C h a p u t  /  Administrateur Systeme
      /v\     Jean-Paul.Chaput at lip6.fr
    /(___)\   work: (33)              
     ^^ ^^    cell:   home:

    U P M C   Universite Pierre & Marie Curie
    L I P 6   Laboratoire d'Informatique de Paris VI
    S o C     System On Chip

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