[Libre-soc-dev] Unexpected clock connexions.

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Jun 3 14:44:03 BST 2021

crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Thu, Jun 3, 2021 at 2:33 PM Jean-Paul Chaput <Jean-Paul.Chaput at lip6.fr>

> Ha. You may have got a wrong impression about clock tree & H-Tree due
> to a trick I used to cut corners.

probably :)

> For the clock signals, do I read correctly that some components with
> run at *external* clock speed (DEBUG & DMI) ?

NO. Debug-DMI and JTAG run at the *PLL* clock.

but they **GENERATE** the RESET signal that is used by the REST of

hence why i asked if the debug reset out should be an H-Tree (of some kind)

i will draw it as a diagram.

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