[Libre-soc-dev] data/instruction cache consistency
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu Jan 28 15:11:29 GMT 2021
On Thu, Jan 28, 2021 at 5:36 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
>
> I found this very interesting document describing instruction fetch, JITs
> and some of the issues that CPUs can run into:
> https://github.com/riscv/riscv-j-extension/blob/master/id-consistency-proposal.pdf
quick read, it reminds of Jacob Bachmeyer's cache-related proposals.
l.
More information about the Libre-soc-dev
mailing list