[Libre-soc-dev] daily kan-ban update 20dec2021

[lkcl]

not much this morning/afternoon, i added some data structures in mmu.py and crossreferenced the Power ISA spec oages.

evening ran the microwatt mmu.bin test under verilator with the MMU and L1 caches, and it didn't completely fall over, displayed "fail".

i then checked some of the SPRs and confirmed that they're not quite being set properly, after a change to how DSISR, DAR, PIDR and PRTBL are stored.

so that is tomorrow's task.

l.