[Libre-soc-dev] interesting blog post about cranelift's new instruction selection pass

vivek pandya vivekvpandya at gmail.com
Thu Sep 24 06:51:32 BST 2020


IIRC there is a bug https://bugs.libre-soc.org/show_bug.cgi?id=405
I agree that compile time can be better than LLVM but I have seem massive
efforts from various companies to reduce compile time for LLVM like
Global-ISel/ new pass manager is intended to do that.
Also one should not neglect the fact that generated code quality must be
comparable between LLVM and Cranelift.

Best thing will be to get compile time data and code quality (like
instruction count, register usage etc) for X86/AArch64 as both LLVM and
CraneLift has that backend.

For PowerPC LLVM backend is very mature now so it feels a bit hard to beat
that with the new Cranelift backend.

Also will it be easier to improve LLVM PPC code gen (maily I think liveness
and register allocation for LibreSOC HW loop) ? or Cranelift has benefits
there because of IR and the design?

Thanks,
Vivek
On Thu, Sep 24, 2020 at 10:35 AM Jacob Lifshay <programmerjake at gmail.com>
wrote:

> Found it in this week's This Week in Rust.
>
> Cranelift is the compiler backend that I intend to use as an alternative to
> LLVM for generating machine code in Kazan.
>
> https://cfallin.org/blog/2020/09/18/cranelift-isel-1/
>
> Jacob
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