[Libre-soc-dev] daily kan-ban update 15oct2020

[Cole Poirier]

On Thu, Oct 15, 2020 at 10:46 AM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
>
> i have no idea and no way to check until we can do simulations of the
> coriolis2 layout.

Ok thanks for clarifying.

> were you running minicom on the serial console and did it show anything?

No, I had no idea about this. Would you mind specifying the process I
should be following with the fpga? I'm struggling, as clearly I'm
missing critical steps/pieces of information, such as 'run minicom on
the serial console', and how to run minicom on the serial console...
I'll be sure to document it on the wiki after that :)

So far I have: (assuming --fpga ulx3s85f)
run `./versa_ecp5.py --build`
run `./versa_ecp5.py --load`
program uploads successfully to fpga
*stare blankly at computer screen because I have no idea what I'm doing*

Cole