[Libre-soc-dev] avoiding huge combinatorial mux-messes

[Luke Kenneth Casson Leighton]

https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=3d_gpu/multiple_function_units.png;h=bbfdc5eb0bd929b8f0dfd0b3ee200ac6de34ac5b;hb=5c7583bef2244c4d726da5f77ccadfdc3816cecb
on the wiki however i found it easier browsing the git repo.

the above is a diagram reproduced with Mitch Alsup's kind permission
from his Scoreboard Mechanics book chapters which augment Thornton's
"Design of a Computer".

the context here is that paul described in a call today that the short
pipeline length of microwatt is making life challenging because there
are large MUXes in front of regfile ports, now.

an example is that there is one port for SRR1/0 for exceptions and it
takes 2 clock cycles to write to that: consequently there is a MUX
sitting on that regfile write port to choose which of those 2 should
be selected: the latch with SRR0 or the latch with SRR1.

Paul outlined that
this has expanded to the point of