[Libre-soc-dev] daily kan-ban update 26 aug 2020
colepoirier at gmail.com
Thu Aug 27 02:00:29 BST 2020
On Wed, Aug 26, 2020 at 4:21 PM <whygee at f-cpu.org> wrote:
> Hello list,
> I'm not a nmigen practitioner but may I suggest VHDL newbies
> to look at some reference books ? Those written by Ashenden are
> usually very good and help make sense of the otherwordly syntax.
> The VHDL semantic is unusual to "software coders" but it's
> tightly defined and every bit has a meaning.
> This would explain why for example for...loop and for...generate
> are different and where/how to use them.
> And Cole, once you've done the translation,
> you could make a "Rosetta stone" to compare the code
> of the same circuit in the two language, so it could
> help others :-)
Very cool idea, thanks for suggesting it Yan! I think a rough
approximation of this can be found in the git commit log as I did this
by interlacing my guess at the nmigen translation with the commented
vhdl original code. I think I will likely be able to do this after
translating a few more vhdl files to nmigen :)
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