[Libre-soc-bugs] [Bug 1249] New: insndb twin-predication, one predicate (sm or dm) is allowed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1249

            Bug ID: 1249
           Summary: insndb twin-predication, one predicate (sm or dm) is
                    allowed
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

source-mask only is perfectly allowed, the dest-mask is implicitly
"all 1s".  likewise, dest-mask only is perfectly allowed, the
src-mask will be implicitly "all 1s".

i will take out the code/check that is stopping this from working?

                "sv.addi/mr/sm=lt 4, *4, 0", # r4 = last non-masked value

======================================================================
ERROR: test_sv_maxloc_1 (__main__.DDFFirstTestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
  File
"/home/lkcl/src/libresoc/openpower-isa/src/openpower/decoder/isa/test_caller_svp64_maxloc.py",
line 58, in test_sv_maxloc_1
    self.sv_maxloc([0,6,1,2])
  File
"/home/lkcl/src/libresoc/openpower-isa/src/openpower/decoder/isa/test_caller_svp64_maxloc.py",
line 102, in sv_maxloc
    lst = list(lst)
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/asm.py",
line 61, in __iter__
    yield from self.trans
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/asm.py",
line 114, in translate
    yield from self.translate_one(insn)
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/asm.py",
line 105, in translate_one
    insn = SVP64Instruction.assemble(record=record,
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/core.py",
line 3380, in assemble
    specifiers = Specifiers(items=specifiers, record=record)
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/core.py",
line 3192, in __new__
    spec.validate(others=(head + tail))
  File "/home/lkcl/src/libresoc/openpower-isa/src/openpower/insndb/core.py",
line 2652, in validate
    raise ValueError("missing dest-mask in CR twin predication")
ValueError: missing dest-mask in CR twin predication

-- 
You are receiving this mail because:
You are on the CC list for the bug.