[Libre-soc-bugs] [Bug 1044] SVP64 implementation of pow(x,y,z)

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Oct 9 13:19:04 BST 2023


--- Comment #43 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
btw just be aware, on the 3-in 2-out instructions with implicit RS,
the pairs (hi lo) are put into separate blocks.
RT (lo half) is consecutive, RS (hi half) starts at RT+MAXVL.

can i sugggest not worrying about how many regs are used, first.
there are... enough :)

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