[Libre-soc-bugs] [Bug 1083] update to DD FFirst Mode binutils PowerDecoder

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1083

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=4e35f44f057adc516b137b03a29f0a476e097dc3

-| 0-1 |  2  |  3   4  |  description              |
-| --- | --- |---------|-------------------------- |
-| 00  |   0 |  dz  sz | simple mode                      |
-| 00  |   1 | 0  RG   | scalar reduce mode (mapreduce) |
-| 00  |   1 | 1  /    | reserved     |
-| 01  | inv | CR-bit  | Rc=1: ffirst CR sel              |
-| 01  | inv | VLi RC1 |  Rc=0: ffirst z/nonz |
-| 10  |   N | dz   sz |  sat mode: N=0/1 u/s |
-| 11  |  /  | / /     |  reserved       |
+| 0-1    |  2  |  3   4  |  description              |
+| ------ | --- |---------|-------------------------- |
+| 0   0  |   0 |  dz  sz | simple mode                      |
+| 0   0  |   1 | 0  RG   | scalar reduce mode (mapreduce) |
+| 0   0  |   1 | 1  /    | reserved     |
+| 1   0  |   N | dz   sz |  sat mode: N=0/1 u/s |
+| VLi 1  | inv | CR-bit  | Rc=1: ffirst CR sel              |
+| VLi 1  | inv | zz RC1  | Rc=0: ffirst z/nonz |

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