[Libre-soc-bugs] [Bug 1035] Implement Scalar Power ISA v3.1 instructions in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1035

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |programmerjake at gmail.com

--- Comment #3 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #1)
> instructions (note, these are all Scalar and they are UnVectoriseable)
> 
> * cfuge, pextd, pdepd
> * brh brw brd - these are actually all covered by grevlut
> * setbc, setbcr, setnbc etc.

these are vectorizable

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