[Libre-soc-bugs] [Bug 1039] add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1039

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
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                 CC|                            |andrey at technepisteme.xyz

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=10d93c409853eb0c7994b43e13eee0560437d058

split out ISAPages so it can be instantiated without needing
entire ISACaller

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