[Libre-soc-bugs] [Bug 1072] implement fcvt/fmv instructions in ISACaller (ls006)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1072

--- Comment #45 from Jacob Lifshay <programmerjake at gmail.com> ---
I added fmv* tests.

I noticed that fmvfg[s] should not have Rc since it doesn't modify FPSCR and
since fp Rc=1 just sets CR1 to bits extracted from FPSCR. I think luke would
appreciate checking with him before I remove Rc=1 support, so that's what I'm
doing.

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=082196180cbf33223a2bf84854831da2c2d27862

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