[Libre-soc-bugs] [Bug 1026] implement Draft Instructions in nmigen HDL

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1026

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
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                 CC|                            |shriya.sharma at redsemiconduc
                   |                            |tor.com

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #9)

> ah, yeah, that too. I was thinking of sharing pipelines because all of the
> div/mod/sqrt stuff has similar hardware that can be shared.

yes. needs planning. and diagrams. shriya has offered last week to do some,
this would be perfect.

> (In reply to Luke Kenneth Casson Leighton from comment #8)

> sounds good to me, though I think we could squeeze a few insns under this
> budget:
> 
> * post-update load/stores
> * set[n]bc[r]
> * [f]minmax*
> * fp/int moves
> * bigint shift ops
> 
> all of those should be pretty simple new hw or simple extensions of existing
> hw

agreed, and no need to adjust this budget - fit within available.
ok i think we're probably done on this one?

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