[Libre-soc-bugs] [Bug 1039] add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1039

--- Comment #32 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #31)

> Reverted:
> https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;
> h=e99cc80eba4a854a9c98ae3d831f901fe7c5d272

so sorry, it was fine, i thought what you were doing was altering
the format of the data (which would not be ok)

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