[Libre-soc-bugs] [Bug 1039] add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1039

--- Comment #31 from Andrey Miroshnikov <andrey at technepisteme.xyz> ---
(In reply to Luke Kenneth Casson Leighton from comment #24)
> 
> please revert.
> 

Reverted:
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=e99cc80eba4a854a9c98ae3d831f901fe7c5d272



(In reply to Luke Kenneth Casson Leighton from comment #26)
> don't waste precious indentation space when there is an 80
> char (79 char) limit.

Fixed:
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=f746c31efca189fb09aec2e661dba686616a846f


(In reply to Luke Kenneth Casson Leighton from comment #29)
> if you invert the calling order of these 4 functions you will NOT need
> the flags added.  see comment #25 and disregard it, and REMOVE
> that flag.

Order inverted:
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=cf1e1acdf0c79d13c478935e195c4c33c4c132a3

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