[Libre-soc-bugs] [Bug 745] OP_TERNLOG instruction

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Sep 29 21:05:31 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=745

--- Comment #64 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #63)
> turns out v3.1B has xxeval, which is a ternlogi-equivalent for VSX

ah! yes, i encountered that briefly, couldn't find it.  i did notice
that the ternlog table is bit-inverted (MSB0), it would be useful to
keep exactly the same table, by bit-inverting ternlogi a[i] b[i] c[i]
to c[i] b[i] a[i]

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