[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=917

--- Comment #77 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
 3037  echo 'sv.subf/ff=eq 0,0,0' | pysvp64asm > sv.subf.ffirst.tst.s
 3038  echo 'sv.subf./ff=eq 0,0,0' | pysvp64asm > sv.subf.ffirst.tst.s
 3039  vi sv.subf.ffirst.tst.s
 3040  powerpc64le-linux-gnu-as sv.subf.ffirst.tst.s 
 3041  powerpc64le-linux-gnu-objdump -D ./a.out
 3042  echo -n -e '\x0c\x00\x40\x05\x51\x00\x00\x7c' | pysvp64dis -v

0c 00 40 05    sv.subf./ff=eq r0,r0,r0
51 00 00 7c    
    spec
        sv.subf. RT,RA,RB OE=0 Rc=1
    RM
        normal: Rc=1: ffirst CR sel
        RM
            000000000000000000001100
        RM.mode
            01100
            27, 28, 29, 30, 31
        RM.inv
            1
            29
        RM.CR
            00
            30, 31

-- 
You are receiving this mail because:
You are on the CC list for the bug.