[Libre-soc-bugs] [Bug 932] New: [simulator]

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=932

            Bug ID: 932
           Summary: [simulator]
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: konstantinos at vectorcamp.gr
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

sv.lha seems to be loading values incorrectly:

Let's assume the buffer of 16-bit ints


00be 00ba 00de 0083

the following snippet:

setvl   0,0,4,0,1,1
sv.lha  *10, 0(3)

Produces the following results:
reg  8 00000000 00000000 ffffffffffffbabe ffffffffffffbabe ffffffffffffbabe
ffffffffffffbabe 00000000 00000000

Which seems incorrect. For one, it should not sign-extend.
Secondly, the order seems wrong, if I am not mistaken the resulting values
should be:

0000000000ba00be etc.

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