[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed Sep 14 01:41:29 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=917

--- Comment #52 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
a$ git checkout b14eaa812791aa6c089bffcfa726a46
Note: switching to 'b14eaa812791aa6c089bffcfa726a46'.
$ python3 src/openpower/sv/trans/test_pysvp64dis.py  > /tmp/f
ERROR: test_2_d_custom_op (__main__.SVSTATETestCase)
FAIL: test_7_batch (__main__.SVSTATETestCase) [26:mtspr]
 : instruction does not match 'mtspr 9,0' expected 'mtspr 288,0'

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