[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Sep 13 19:02:14 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=917
--- Comment #46 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Dmitry Selyutin from comment #43)
> I copied and pasted the last test into pysvp64asm (notorious for its longs).
> Here's what I got after calling binutils:
>
> addi 4,4,65408
these look like constants have been mis-converted, not recognised
as sign-extended negative numbers, truncated instead to 16-bit
> addi 4,4,65408
> addi 16,16,65408
> addi 16,16,65532
> bc 16,0,0xff4c
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