[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=917

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           See Also|                            |https://bugs.libre-soc.org/
                   |                            |show_bug.cgi?id=871

--- Comment #40 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Dmitry Selyutin from comment #39)
> now. Note that some fields are present in base RM class: I didn't want to
> duplicate all these fields in all children subclasses. This leads to the
> fact that say insn.prefix.rm.cr_ops will also have ewsrc inherited, it just
> won't be used.

ack.  ok apologies, i had to *yet again* redo pack/unpack,
the temporary hack is an overload of RM.elwidth.

the reason is, pack/unpack has to go into SVSTATE and be specially
updated by setvl.

https://bugs.libre-soc.org/show_bug.cgi?id=871#c4

> RM.elwidth

overloaded 2 bits, pack and unpack, and only in normal mode.
this will move AT SOME time not now to a new VL mode

> RM.normal.elwidth

here is temporarily joined by pack/unpack bits

> RM.normal.pu
> RM.normal.pu.SVM

removed.

> RM.normal.satpu
> RM.normal.satpu.N
> RM.normal.satpu.zz
> RM.normal.satpu.dz
> RM.normal.satpu.sz

all removed.

> RM.ldst_imm.elwidth

NOT joined by packunpack.

> RM.ldst_imm.spu
> RM.ldst_imm.spu.zz
> RM.ldst_imm.spu.els
> RM.ldst_imm.spu.dz
> RM.ldst_imm.spu.sz

all removed.

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