[Libre-soc-bugs] [Bug 917] pysvp64dis: support SVP64 disassembly

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=917

--- Comment #33 from Dmitry Selyutin <ghostmansd at gmail.com> ---
Since I'm unsure about CRs, I took this opportunity to cleanup opcodes even
more. Here's brand new representation:

59 00 00 58    svshape 1,1,1,0,1
    spec
        svshape SVxd,SVyd,SVzd,SVrm,vf
    opcodes
        010110---------------0000-011001
        010110---------------0001-011001
        010110---------------0010-011001
        010110---------------0011-011001
        010110---------------0100-011001
        010110---------------0101-011001
        010110---------------0110-011001
        010110---------------0111-011001
        010110---------------1010-011001
        010110---------------1011-011001
        010110---------------1100-011001
        010110---------------1101-011001
        010110---------------1110-011001
        010110---------------1111-011001

19 04 c0 5b    svshape2 15,0,0,1,0,0
    spec
        svshape2 SVo,SVyx,rmm,SVd,sk,mm
    opcodes
        010110---------------100--011001

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