[Libre-soc-bugs] [Bug 919] pysvp64dis: disassemble word instructions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=919

--- Comment #8 from Dmitry Selyutin <ghostmansd at gmail.com> ---
I fixed the immediate operands, both for spec and per-operand information.
Here's how it looks:

00 20 40 05    sv.lwz
08 00 61 80
    spec
        sv.lwz RT,D(RA)
    binary
        [0:8]   00000101
        [8:16]  01000000
        [16:24] 00100000
        [24:32] 00000000
        [32:40] 10000000
        [40:48] 01100001
        [48:56] 00000000
        [56:64] 00001000
    opcode
        0x80000000
    mask
        0xfc000000
    RT
        01010
        [6, 7, 8, 9, 10]
    D
        0010000000000000
        [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
    RA
        00000
        [11, 12, 13, 14, 15]

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