[Libre-soc-bugs] [Bug 899] implement additional Transcendentals in simulator

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=899

--- Comment #12 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #8)
> (In reply to Jacob Lifshay from comment #7)
> > found an empty spot with enough space, once fdmadds is moved.
> 
> ffadds can share the space with fptrans, once it's converted to X-FORM.

I moved ffadds (converted to X-FORM) and fdmadds:

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=6507ee86c014b70fac45578500fc87612403d664

I found and updated the hack to detect if an instruction is SVP64 FFT or not,
converting it to:

# main PowerDecoder2 determines if different SVP64 modes enabled
# detect if SVP64 FFT mode enabled (really bad hack),
# exclude fcfids and others
# XXX this is a REALLY bad hack, REALLY has to be done better.
# likely with a sub-decoder.
major = Signal(6)
comb += major.eq(self.dec.opcode_in[26:32])
xo = Signal(10)
comb += xo.eq(self.dec.opcode_in[1:11])
comb += self.use_svp64_fft.eq((major == 59) & xo.matches(
    '-----00100',  # ffmsubs
    '-----00101',  # ffmadds
    '-----00110',  # ffnmsubs
    '-----00111',  # ffnmadds
    '1000001100',  # ffadds
    '-----11011',  # fdmadds
))

All tests in openpower-isa.git pass (though I had to do a git diff on the
output logs to find that hack, `setarch -R` makes it easier since addresses
don't change as much).

TODO(lkcl or whoever): fix that annoying hack!

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