[Libre-soc-bugs] [Bug 921] New: pysvp64dis: support instruction aliases

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=921

            Bug ID: 921
           Summary: pysvp64dis: support instruction aliases
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: ghostmansd at gmail.com
          Reporter: ghostmansd at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

Some instructions, most notably branches, have different representation
depending on the operands. For example, `bc 2, 9, 8` becomes `bdzf
4*cr2+gt,0x8`, thus both the name and the count of operands is changed (if we
consider operands to be separated by the comma).

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