[Libre-soc-bugs] [Bug 784] Implement cl* instructions for carry-less operations

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=784

--- Comment #2 from Jacob Lifshay <programmerjake at gmail.com> ---
A 64x64+64 clmuladd gives:
=== top ===

   Number of wires:               8076
   Number of wire bits:          17022
   Number of public wires:          74
   Number of public wire bits:    9020
   Number of memories:               0
   Number of memory bits:            0
   Number of processes:              0
   Number of cells:               8129
     $_AND_                       2731
     $_NAND_                      1365
     $_XNOR_                        63
     $_XOR_                       3970

yosys likes alternating between and/nand and xor/xnor apparently.

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