[Libre-soc-bugs] [Bug 724] Determine required memory compiler developments

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=724

--- Comment #16 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Staf Verhaegen from comment #15)

> The dual port SRAM can be used with one port as the fixed write port and one
> port as the fixed read port. If you double the number of blocks you can than
> make a wrapper that has one write port and two read ports, with three blocks
> it is one write and three read ports etc.

indeed.  and that can be isolated behind a standard nmigen "Memory" compatible
interface, and is a far simpler and much less disruptive job.

can you make available what you have so far so that we (and other people)
can take a look? [rather than delay several weeks until the results of the
MPW run are available]

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