[Libre-soc-bugs] [Bug 724] Determine required memory compiler developments

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=724

--- Comment #13 from Staf Verhaegen <staf at fibraservi.eu> ---
Just to notify I have seen bug #781 but currently don't have time to give
technical feedback. I first need to finish Sky130 tape-out of single port SRAM
which will be very close to be able to make it.

Just want to comment now that making a block that does a read followed by a
write in one clock cycle is more risky than having a dual port RAM where you
can do the read on one port and a write on the other port in the same clock
cycle.
It will take up more space though.
Details after I have finished the tape-out.

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