[Libre-soc-bugs] [Bug 864] implement parallel prefix reduction in simulator

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Jun 26 11:10:45 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=864

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #7)
> (In reply to Luke Kenneth Casson Leighton from comment #6)
> > dynamically predictable.  result will always be in the position
> > of the very first predicate-bit.
> > sv.mv with source
> i think you meant dest

no, source.  the selection of the result(s) of the [parallel-prefixed]
output become a source to a second sv.mv, using the same predicate mask.
the destination is a scalar.  you have it below: "...sv.mv rt.s, ra.v acts..."

> > set to scalar and mask set to the same predicate
> > gets that, predictably.
> 
> yes, but, because sv.mv rt.s, ra.v acts like a mv.x, it'll likely be very
> slow...

that's down to implementors to spot the pattern and optimise it.

* "dest is scalar therefore only 1st bit of predicate matters"
* "only 1st bit matters therefore only one mv needs to be done"

basically: Officially Not Our Problem.  worth mentioning as an Implementor's
Note, but Not Our Problem.

other methods: don't damn well use predication in the first place.  use
a non-zero predicate mv to reduce them down to a contiguous set, first.

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