[Libre-soc-bugs] [Bug 865] implement vector bitmanip opcodes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=865

--- Comment #11 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #10)
> me on irc:
> > lkcl, imho sv.adde is sufficient for biginteger add, cprop is rendered
> > redundant because you can just do the trick of having your 256-bit
> > simd unit do a 256-bit add and forward co from the previous clock cycle
> > to ci in the current cycle to get full-speed bigint add
> 
> > so imho we should remove cprop

lkcl:
> programmerjake, i was kinda thinking either well beyond 256, 512 or
> 1024, and also of other circumstances invlving carry
> and, also, for other vector mask purposes, problem being it was 20
> years ago i worked with the Aspex ASP

me:
> beyond 1024 bits? just use the CA register to hold carry between
> one vector add and the next. also, scalar adde can be used as a
> carry propagate instruction like cprop, but with the inputs encoded
> differently.
> for adde RT, RA, RB: set the bit in RA when the element add
> produces >= 0xFFFF...FFFF, set the bit in RB when the element add overflows.
> the same sv.adde 256-bit and carry forwarding tricks work for sv.subfe
> so, imho cprop is still rendered unnecessary

-- 
You are receiving this mail because:
You are on the CC list for the bug.