[Libre-soc-bugs] [Bug 864] implement parallel prefix reduction in simulator

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=864

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
first version including a "yield" version which does not require
a move operation.

https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/preduce.py;h=5fb4f26f6d349e5fdf0d15cb50f66a4da6fa40e4;hb=13c4a19e93caf4dc817c508f70f3af42749a7a87

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