[Libre-soc-bugs] [Bug 859] New: Implement SPR_KAIVB

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=859

            Bug ID: 859
           Summary: Implement SPR_KAIVB
           Product: Libre-SOC's second ASIC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: source code
          Assignee: lkcl at lkcl.net
          Reporter: tpearson at raptorengineering.com
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

Kestrel currently uses a custom SPR (SPR_KAIVB: SPR 850) to allow the interrupt
table to be relocated at runtime out of ROM into RAM.  Similar functionality is
provided in POWER8+ in terms of the hypervisor instruction set, but since those
optional instructions are not available in LibreSoC we need a different access
mechanism for the same functionalty.

Without the ability to relocate the interrupt table, we cannot use ISRs in the
ROM bootloader, significantly slowing down the early boot process for many
real-world use cases.  Several attempts have been made to develop a solution
that would stub all interrupt calls out in ROM, but they have proven fragile
and difficult to work with in practice.

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