[Libre-soc-bugs] [Bug 887] New: implement fmvis and 2nd-half variant

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=887

            Bug ID: 887
           Summary: implement fmvis and 2nd-half variant
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

implementation hints:

* https://libre-soc.org/openpower/sv/bitmanip/ for the XO field
  to go into major_22.csv
* see commit-diffs in https://bugs.libre-soc.org/show_bug.cgi?id=863
  for tips on files to be changed
* https://libre-soc.org/openpower/sv/int_fp_mv/#fmvis
  for spec including source code
* run "pywriter noall av" after each edit to av.mdwn, to produce
  av.py

edit these when done each stage:

* TODO: major_22.csv entry
* TODO: add entries into power_enums.py (string)
* TODO: add "exception recognition" in ISACaller (isacaller.py)
* TODO: sv/trans/svp64.py entry (recognising opcode, turning into ".long")
* TODO: add pseudocode (to av.mdwn) see spec page
* TODO: add unit test

before each commit is pushed FOR GOODNESS SAKE run a modicum of unit tests
to ensure no "damage" is done:

* power_fields.py check it produces no errors
* power_decoder.py check it produces no errors
* test_caller_alu.py >& /tmp/f grep for "Err" in output
* test_caller_setvl.py >& /tmp/f grep for "Err" in output

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