[Libre-soc-bugs] [Bug 236] Atomics Standard writeup needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=236

--- Comment #14 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #13)
> jacob the non-L1-cache instructions are intended for pushing directly
> through OpenCAPI, which has direct corresponding capability.  ariane/pulpino
> *very specifically* implemented amo* as a single ALU directly built-in to
> the L2 cache.

regardless, the technique I described can be used to optimize AMOs to work well
at the L1 cache and at other caches/memory/opencapi -- it would just be
modified to handle access from outside the cache where the tracking is
implemented.

My point is that it can be done, not that it has to use the algorithm i gave.

Having fast atomics that may operate in the L1 cache is imho a requirement for
a good cpu/gpu.

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