[Libre-soc-bugs] [Bug 855] add libre-soc to kestrel

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jul 5 20:03:06 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=855

--- Comment #26 from tpearson at raptorengineering.com ---
As promised, a large update...

Main repositories available here:

https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/litex

https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-cpu-libresoc

https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/litex-boards

https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-firmware/zephyr-firmware

A single module Arctic Tern card, in the PCIe carrier, is the hardware target.

Those include the recent change to fix mulhd, which allows Zephyr to boot and
we can load Web pages using the exact same binary used with Microwatt -- in the
end, the timing differences are not a major problem at least under Zephyr.  See
attached screenshot...

BIOS output:

====================================================
    __ __          __            __
   / //_/__  _____/ /_________  / /
  / ,< / _ \/ ___/ __/ ___/ _ \/ /
 / /| /  __(__  ) /_/ /  /  __/ /
/_/_|_\___/____/\__/_/ __\___/_/ _________
  / ___/____  / __/ /_/ __ )/  |/  / ____/
  \__ \/ __ \/ /_/ __/ __  / /|_/ / /
 ___/ / /_/ / __/ /_/ /_/ / /  / / /___
/____/\____/_/  \__/_____/_/  /_/\____/

====================================================

 (c) Copyright 2020-2022 Raptor Engineering, LLC
 (c) Copyright 2012-2020 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Jul  5 2022 13:02:44
 BIOS CRC passed (59e4ee3e)

 Migen git sha1: 5d8ad08
 LiteX git sha1: 7495d92c

--=============== SoC ==================--
CPU:            LibreSoC @ 50MHz
BUS:            WISHBONE 32-bit @ 4GiB
CSR:            8-bit data
ROM:            52KiB
SRAM:           8KiB
L2:             8KiB
SDRAM:          1048576KiB 32-bit @ 200MT/s (CL-6 CWL-5)

--========== Initialization ============--
Ethernet init...
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b0: |01110000| delays: 02+-01
  m0, b1: |00000000| delays: -
  m0, b2: |00000000| delays: -
  m0, b3: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b0: |01110000| delays: 02+-01
  m1, b1: |00000000| delays: -
  m1, b2: |00000000| delays: -
  m1, b3: |00000000| delays: -
  best: m1, b00 delays: 02+-01
  m2, b0: |01110000| delays: 02+-01
  m2, b1: |00000000| delays: -
  m2, b2: |00000000| delays: -
  m2, b3: |00000000| delays: -
  best: m2, b00 delays: 02+-01
  m3, b0: |01110000| delays: 02+-01
  m3, b1: |00000000| delays: -
  m3, b2: |00000000| delays: -
  m3, b3: |00000000| delays: -
  best: m3, b00 delays: 02+-01
  best: m3, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x00000040000000 (2MiB)...
  Write: 0x40000000-0x40200000 2MiB
   Read: 0x40000000-0x40200000 2MiB
Memtest OK
Memspeed at 0x00000040000000 (2MiB)...
  Write speed: 10MiB/s
   Read speed: 11MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
             Timeout
Booting from network...
Local IP: 192.168.1.50
Remote IP: 192.168.1.1
Booting from boot.json...
Booting from boot.bin...
Copying boot.bin to 0x00000040000000... (641024 bytes)
Executing booted program at 0x40000000

--============= Liftoff! ===============--
*** Booting Zephyr OS build zephyr-v2.5.0-3798-gc14cfa8dd9bf  ***


[00:00:03.985,852] <err> gpio_litex: H
[00:00:03.985,949] <inf> spi_tercel: Raptor Tercel SPI master found, device
version 1.0.-939524096 0x000038c1/0x4009c224

[00:00:03.996,337] <inf> spi_tercel: Tercel SPI controller frequency configured
to 4 MHz (bus frequency 10 MHz, dummy cycles 10305)

[00:00:03.996,856] <err> spi_nor: SFDP magic 00000000 invalid
[00:00:03.996,915] <err> spi_nor: SFDP read failed: -22
[00:00:04.024,300] <inf> shell_telnet: Telnet shell backend initialized
[00:00:04.029,245] <inf> net_config: Initializing network
[00:00:04.029,762] <inf> net_config: IPv4 address: 192.168.1.80
[00:00:04.030,173] <inf> net_config: Running dhcpv4 client...
uart:~$ Area 2 at 0xc00000 on bmc for 4194304 bytes

<etc>

I *think* we might be able to call this one closed soon. :)  Great job to all
involved, this is no small feat -- 600k+ of binary running as-is on a
completely different CPU...

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