[Libre-soc-bugs] [Bug 877] implementation and formal correctness proof for fp fused-mul-add pipeline excluding ieee754 exception flags

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=877

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |programmerjake at gmail.com
            Summary|formal correctness proof    |implementation and formal
                   |for fmadd on IEEE754FP      |correctness proof for fp
                   |pipeline                    |fused-mul-add pipeline
                   |                            |excluding ieee754 exception
                   |                            |flags
          Component|ALU (including IEEE754      |Formal Verification
                   |16/32/64-bit FPU)           |
             Blocks|196                         |
         Depends on|                            |835
       The table of|                            |jacob=1650
  payments (in EUR)|                            |
     for this task;|                            |
        TOML format|                            |


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=196
[Bug 196] Formal correctness proof needed for the IEEE754 FPU
https://bugs.libre-soc.org/show_bug.cgi?id=835
[Bug 835] add support for smtlib2 floating-point to yosys and nmigen
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