[Libre-soc-bugs] [Bug 877] New: formal correctness proof for fmadd on IEEE754FP pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=877

            Bug ID: 877
           Summary: formal correctness proof for fmadd on IEEE754FP
                    pipeline
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: ALU (including IEEE754 16/32/64-bit FPU)
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

similar to bug #869 a formal correctness proof is needed for
FP mul-and-add

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