[Libre-soc-bugs] [Bug 950] pysvp64asm: support insndb-based assembly for SVP64 instructions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=950

--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Dmitry Selyutin from comment #13)

> 
> With master branch, it gets converted to this:

> .long 0x580009F6 # setvl 0, 0, 5, 1, 1, 1 # setvl 0, 0, 5, 1, 1, 1
> .long 0x05400400; cmp 0, 1, 1, 14 # sv.cmp 0, 1, *4, 14
> .long 0x05400800; isel 14, 1, 14, 1 # sv.isel 14,*4,14,1
> .long 0x59800A27 # svstep. 12, 6, 0 # svstep. 12, 6, 0
> .long 0x05400000; isel 10, 12, 10, 1 # sv.isel 10,12,10,1
> .long 0x58000027 # svstep. 0, 1, 0 # svstep. 0, 1, 0
> bc 6, 3, -0x24

yep. notice how the scalar ops are preserved.  this is critical.

> 
> With insndb branch, it gets converted to this:
> 
> .long 0x580009F6 # setvl 0,0,5,1,1,1 # setvl 0, 0, 5, 1, 1, 1
> .long 0x05400400; .long 0x7C217000; # cmp 0,1,*4,14 # sv.cmp 0, 1, *4, 14

base instruction is needed here

> .long 0x05400800; .long 0x7DC1705E; # isel 14,*4,14,1 # sv.isel 14,*4,14,1

and here

> .long 0x59800A27 # svstep. 12,6,0 # svstep. 12, 6, 0
> .long 0x05400000; .long 0x7D4C505E; # isel 10,12,10,1 # sv.isel 10,12,10,1

and here

> .long 0x58000027 # svstep. 0,1,0 # svstep. 0, 1, 0
> .long 0x40C3FF70 # bc 6,3,-0x24 # bc 6, 3, -0x24

and here.

> 
> This should behave in an identical way; 

no it should not.  ISACaller is quite dumb: the assembly listing
has to be passed through to the unit test alongside the binary.
both are converted to lists and zipped up.
except for *explicitly added* instructions NOT found in ppc64le-gnu-
8 9 and 10 ISACaller *requires* the original assembler listing in
order to know and report the instruction.

on encountering ".long 0x40C3FF70" ISACaller is going, "what instruction
assembler mnemonic is that, i have no idea.

it should be reasonably straightforward to fix that but obviously
only when full decode back to assembler is also implemented.

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