[Libre-soc-bugs] [Bug 781] create wrapper register files around 1R-or-1W SRAMs

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=781

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cesar Strauss from comment #9)

> Full 1W/1R register file works!

cool!  if only it didn't require 4x 1RW SRAMs to do it :)
but, it is important, as a fall-back.

> https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/regfile/sram_wrapper.
> py;hb=695108b7e98dc23073cf952825e18b6dce10e6d8#l544

ah, a single-bit for the "last value", that could be a DFF,
it is not so costly.

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